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OpenAI and Synopsys will build an AI model for chip-design tools

The planned GPT-Synopsys model is meant to operate electronic-design tools used to build and verify semiconductor layouts. OpenAI will license Synopsys software; a revenue-sharing framework is part of the deal, but its financial terms are undisclosed.

By Wrivid News Desk
The office building that housed OpenAI headquarters when this photo was taken in June 2025. Contextual file photo; it does not depict the reported event.
The office building that housed OpenAI headquarters when this photo was taken in June 2025. Contextual file photo; it does not depict the reported event.File photo: Coolcaesar / Wikimedia Commons (CC BY 4.0; resized without cropping) · file details · Creative Commons Attribution 4.0 International (CC BY 4.0); Commons 1,280 × 853 rendition, unaltered

Executive summary

  • The partnership: OpenAI and Synopsys signed a multiyear agreement to develop GPT-Synopsys, a specialized AI model intended to use Synopsys electronic-design-automation tools in semiconductor workflows.[1][2]
  • The commercial structure: OpenAI will license Synopsys software for the work. Reuters reported that the deal also includes a training subscription and shared revenue when the companies bring the product to customers; neither company disclosed financial terms.[1][2]
  • What remains unproven: The companies say the model should help engineers explore designs and optimize power, performance and area. They have not released a product timetable or public benchmark demonstrating faster chip development, so those benefits remain goals rather than measured outcomes.[1]

OpenAI and chip-design software maker Synopsys have signed a multiyear agreement to develop GPT-Synopsys, a specialized model designed to work with Synopsys electronic-design-automation tools. The companies say it will learn to operate those tools, interpret their outputs and help engineers run semiconductor design workflows.[1][2]

Electronic-design-automation software supports work such as translating circuit descriptions into physical layouts and checking whether designs meet engineering requirements. Synopsys says the model is intended to help engineers explore more alternatives and make tradeoffs among power use, performance and chip area. That description comes from the companies; they have not published comparative results showing how much time or cost the model will save.[1]

The arrangement combines model development with licensing of proprietary design software. Synopsys said OpenAI will license its tools for the collaboration and the companies will use a shared revenue framework. Reuters reported that OpenAI will pay a subscription fee while the model is trained to use those tools. No public dollar value for the agreement was provided.[1][2]

The partnership connects a frontier-model developer to software used in a technically demanding stage of semiconductor production. If the system can reliably use engineering tools and verify its work, it could change how designers test and refine complex chips. The announcement does not establish that it can independently produce a manufacturable design or that it will shorten development cycles.[1][2]

The product remains under development. The companies have not announced a release date, and the announcement contains no public customer case study, benchmark or independent evaluation. The commercial outcome will depend on how accurately the model handles engineering tasks, integrates into existing workflows and helps customers make designs that pass verification and manufacturing checks.[1]